Hirundo: Synthesizable-from-C Embedded Processor

The processor is described in synthesizable C by LegUp (from University of Toronto) or Vivado HLS (from Xilinx) tools to generate its RTL description. The processor contains a host MIPS processor and a small SUBLEQ co-processor which emulates any operations in absence of hardware resources on the host processor. In addition, the framework contains a built-in profiler to ease the developer to analyze the program and customize the processor for specific applications.
    Source Code

    Published Paper

  • T. Ahmed, N. Sakamoto, J. Anderson, & Y. Hara-Azumi  "Synthesizable-from-C Embedded Processor Based on MIPS-ISA and OISC" In Proceeding of IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC), pp.114-123, Porto, Portugal, Oct. 2015.

SUBLEQ Toolchain

Noriaki will add the description.

    Source Code

    Published Paper

  • T. Ahmed, N. Sakamoto, J. Anderson, & Y. Hara-Azumi, "Synthesizable-from-C Embedded Processor based on MIPS ISA and OISC" In Proceeding of IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC), pp.114-123, Porto, Portugal, Oct. 2015.

SubRISC: Simple Instruction-Set Computer for IoT edge devices

We have developed a small and energy-efficient RISC processor, called SubRISC, which has the limited number of simple instructions extended from Subtract and branch on NeGative with 4 operands (SNG4). The processor is described in synthesizable Verilog HDL by Synopsys Design Compiler.

    Source Code

    Published Paper

  • K. Saso and Y. Hara-Azumi, "Simple Instruction-Set Computer for Area and Energy-Sensitive IoT Edge Devices," In Proceeding of 29th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, Jul. 2018.
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